The present invention relates to a display device, a method of manufacturing the same and a wiring board for a display device. More particularly, the invention relates to a display device with a short-circuit wiring representing a short circuit due to the electrostatic breakdown between the wirings by short-circuiting with another wiring, a method of manufacturing the same and a wiring board.
As an image display device for a personal computer or other various monitors, a liquid crystal display (LCD) device has been remarkably widespread. In general, the liquid crystal display device includes a liquid crystal display panel with a drive circuit, and a backlight unit disposed on a back surface thereof. The display panel displays an image by controlling light transmitted therethrough. The display panel includes a display area made from a plurality of sub-pixels disposed in the form of matrix, and an outer peripheral area formed in an outer periphery thereof. Among the liquid crystal display devices, there is an active matrix LCD in which each sub-pixel has a switching element such as a Thin Film Transistor (TFT) and a Metal Insulator Metal (MIM).
Since the active matrix LCD is able to perform a subtle gray-scale display and has a high contrast, it is widely adopted for a high-definition display device or a color LCD device. The color LCD device is typically formed by sealing liquid crystal between an array substrate and a color filter substrate with color filters, the array substrate having switching elements, pixel electrodes and the like formed in the form of array. The color LCD has a color filter, each of R, G and B for each sub-pixel, and performs a color display by controlling a quantity of light from each sub-pixel. Three sub-pixels of R, G and B form one pixel. Note that, in a monochrome LCD, each sub-pixel corresponds to the pixel.
FIG. 1 is a conventional view schematically showing a sub-pixel with a TFT as a switching element. Only a sub-pixel that is formed on the TFT substrate side is shown. In FIG. 1, a bottom gate type TFT is shown which uses amorphous silicon (a-Si) as a semiconductor. Besides this, there exist a bottom gate type TFT using polysilicon as a semiconductor, or a top gate type TFT and the like. The bottom gate type TFT is a TFT in which a gate of the TFT is disposed in a lower layer than a layer of a drain/source.
In the drawing, a reference numeral 11 denotes a TFT as a switching element; a numeral 12 a gate electrode; a numeral 13 a gate insulating layer; a numeral 14 an amorphous silicon (a-Si) layer; a numeral 15 an ohmic layer improving an ohmic contact between the a-Si layer and electrodes; a numeral 16 a source electrode; a numeral 17 a drain electrode; and a numeral 18 a pixel electrode applying an electric field to liquid crystal. The ohmic layer 15 is doped with P or As as a donor. The gate electrode 12 is connected to a Y axis side driver IC (not shown) via a gate line 19, and the source electrode 16 is connected to an X-axis side driver IC (not shown) via a signal line 20. Note that, since the TFT 11 is driven by an alternating current, the polarities of the source electrode 16 and the drain electrode 17 are inverted with the passage of time.
An operation of the sub-pixel will now be described. A signal is sent from the Y-axis driver IC via the gate line 19 to each gate electrode 12. By this signal, a gate voltage of the TFT 11 is manipulated to turn on/off the TFT 11. Moreover, a signal is sent from the X-axis driver IC via the signal line 20 to the source electrode 16. Whether or not the signal is transmitted from the source electrode 16 to the drain electrode 17 is controlled by the gate electrode 12. An amplitude of a signal voltage to the drain electrode 17 is controlled by changing a signal voltage value from the X-axis driver IC to the source electrode 16. The pixel electrode 18 having the signal voltage sent from the drain electrode 17 applies a voltage to the liquid crystal, between the pixel electrode 18 and a common electrode (not shown) formed on an opposing substrate. The gray-scale display can be performed by changing the voltage applied to the liquid crystal.
FIG. 2 is a constructional view schematically showing a TFT array substrate. In the drawing, a reference numeral 21 denotes a display area; reference numeral 22 is an outer peripheral area; reference numeral 23 are signal lines; reference numeral 24 are gate lines; and reference numeral 25 are short rings. In manufacturing the TFT array substrate, wirings 25 called short rings are formed at the outside of the display area 21. Each short ring is a wiring in which end terminals of each signal line and gate line are short-circuited with each other in order to prevent electrostatic breakdown in an active matrix wiring.
However, each short ring 25 functions only after completing the gate line 24 and the signal line 23. Therefore, particularly in the case where the signal line 23 has a plurality of layers, there has been a problem that a short circuit occurs between the signal line 23 and the gate line 24 before an uppermost layer of the signal line 23 is attached. Moreover, it has been known that the electrostatic breakdown frequently occurs particularly between the most external signal line of the display area 21 and a gate line thereunder. This is because an electric charge causing the electrostatic breakdown is apt to accumulate on a substrate end since the substrate end is grasped or contacts with a device when the substrate is carried, and thus it is conceived that the electrostatic breakdown is apt to occur between the external electric conductors.
As means for preventing such electrostatic breakdown before the completion of the signal line, a dummy signal line is formed on the outer peripheral area. This is a wiring formed at the further outside of the most external signal line in the display area in an electrically floating state. This dummy line has the same construction as that of the signal line, and is formed at the same time when the signal line is formed. By forming such a dummy signal line, a short circuit due to the electrostatic breakdown may occur between the gate line and the dummy signal line, thus the defect due to the short circuit between the signal line and the gate line can be prevented.
However, even in the case where the dummy line is formed in the above-described manner, there has been a problem that the dummy line causes a short circuit with two or more of the gate lines. In such a case where short circuits occur at two or more spots, two gate lines are electrically connected to each other thus causing a defect called an inter-gate-line short circuit. In order to prevent such a short circuit therebetween, it is conceived that the dummy line between the gate lines is previously cut. However, when the dummy line is disconnected in such a manner as described above, since capacitance of each of the cut dummy lines is decreased, there has been a problem that the electrostatic breakdown occurs not between the dummy line and the gate line but between the most external signal line and gate line.
In order to solve the foregoing problems, the feature of the present invention is to obtain a display device, a method of manufacturing the same and a wiring board for a display device, which are capable of preventing the short circuit between the wirings.
Another feature of the present invention is to obtain a display device, a method of manufacturing the same and a wiring board for a display device, which are capable of, even in the case where the dummy line and other two or more wirings are short-circuited, for eliminating a short circuit between the two or more wirings. Still another feature of the present invention is to obtain a display device, a method of manufacturing the same and a wiring board for a display device, which are capable of, even in the case where the dummy line and other two or more wirings are short-circuited, for eliminating the short circuit between the two or more wirings, and also capable of maintaining an aptitude to cause the short circuit in the dummy wiring.
When grasped as a method of manufacturing a display device, a first aspect of the present invention is a method of manufacturing a display device with a display area having a plurality of sub-pixels disposed in the form of matrix, the method comprising the steps of: forming a plurality of lower layer wirings on a substrate, the lower layer wiring sending electric signals to a plurality of sub-pixels; forming an insulating layer on the plurality of lower layer wirings; forming, on the insulating layer, a plurality of upper layer wirings sending electric signals to the plurality of sub-pixels and a short circuit wiring at the outside of the plurality of upper layer wirings and at the outside of the display area; and removing the whole short circuit wiring, alternatively removing a part thereof, to disconnected electrically the short circuit wiring.
When grasped as a method of manufacturing a display device, another aspect of the present invention is a method of manufacturing a display device with a display area having a plurality of sub-pixels disposed in the form of matrix, said method comprising the steps of: forming a plurality of lower layer wirings on a substrate, the lower layer wirings sending electric signals to the plurality of sub-pixels; forming an insulating layer on the plurality of lower layer wirings; forming a plurality of upper layer wirings and a short circuit wiring on the insulating layer, the upper layer wiring sending electric signals to the plurality of sub-pixels; and removing the whole short circuit wiring, alternatively removing a part thereof to electrically disconnected the short circuit wiring, wherein a short circuit due to dielectric breakdown between the short circuit wiring and the lower layer wirings is more apt to occur than between the upper layer wirings and the lower layer wirings, alternatively than between the lower layer wirings.
When grasped as a display device, yet another aspect of the present invention is a display device with a display area constituted of a plurality of sub-pixels disposed in the form of matrix, comprising: a substrate; a plurality of lower layer wirings sending electric signals to the plurality of sub-pixels, the lower layers being formed on the substrate; an insulating layer formed on the plurality of lower layer wirings; a plurality of upper layer wirings sending electric signals to the plurality of sub-pixels, the upper layer wirings being formed on the insulating layer; and a short circuit wiring formed at the outside of the plurality of upper layer wirings and at the outside of said display area, the short circuit wiring being formed on said insulating layer, wherein the whole short circuit wiring is removed, alternatively a part thereof is removed after being formed, to be electrically disconnected.
When grasped as a wiring board, still another aspect of the present invention is a wiring board, comprising: a plurality of lower layer wirings formed on a substrate; an insulating layer formed on the lower layer wirings; a plurality of upper layer wirings formed on the insulating layer; a short circuit wiring repressing a short circuit between the upper layer wirings, alternatively between the lower layer wirings, by short-circuiting with the lower layer wirings via the insulating layer, the short circuit wiring being formed on the insulating layer, wherein the whole short circuit wiring is removed, alternatively a part thereof is removed after being formed, to be electrically disconnected.
When grasped as a display device, a still further aspect of the present invention is a display device with a display area constituted of a plurality of sub-pixels disposed in the form of matrix, comprising: a substrate; a plurality of lower layer wirings sending electric signals to the plurality of sub-pixels, the lower layer wirings being formed on the substrate; an insulating layer formed on the plurality of lower layer wirings; a plurality of upper layer wirings sending electric signals to the plurality of sub-pixels, the upper layer wirings being formed on the insulating layer; and a short circuit wiring formed on the insulating layer, wherein the short circuit wiring is short-circuited with the lower layer wirings via the insulating layer, and the short circuit wiring is electrically disconnected after being formed.
Various other objects, features, and attendant advantages of the present invention will become more fully appreciated as the same becomes better understood when considered in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the several views.